Integrated circuits are typically produced using a semiconductor wafer on which multiple copies, or die, of the circuit are simultaneously fabricated. After fabrication, the die are tested and separated in preparation for packaging. The functional die are attached to a lead frame having positions for several die. The die is electrically connected to the lead frame by wire bonding, and encapsulated with a mold compound. The packaged die are then separated from the lead frame and may be tested prior to shipment.
The lead frame metallization may include electroplated nickel (Ni) and palladium (Pd). A gold layer is typically electroplated over the palladium layer to improve the wetting of solder to the leads when the packaged die is mounted to a circuit board. The gold is typically formed on all exposed palladium surfaces of the lead frame.
The described manufacturing protocol results in packaged integrated circuits that have a favorable reliability record. However, a number of packaged die failures may still occur due to imperfect adhesion of the mold compound to the lead frame that allows ingress of moisture into the package. Such failures may result in lower packaging yield or may even occur in a customer installation.
Accordingly, what is needed in the art is an improved method of packaging that reduces the failure rate of packaged integrated circuits.